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  AUIR0815S 1 www.irf.com ? 20 12 international rectifier january 08, 2013 automotive grade buffer gate driver ic features ? high peak output current > 10a ? low propagation delay time ? negative turn off bias can be applied to v ee using an external supply ? two output pins permit to cho o se different ron and roff resistors. ? low supply current ? undervoltage lockout ? continuous ?on? capability ? suitable for high power inverter applications in conjunction with an external pre - driver ? lead- free, rohs compliant ? automotive qualified description the auir0815 buffer gate driver family, in conjunction with a pre - driver stage, is suited to drive a single half bridge in power switching applications. these buffer gate drivers incorporate the ability to enter into a low quiescent current mode . product summary v cc - gnd 10v to 30v gnd - v ee - 1v to 20v vcc - v ee 10v to 30v i o drive > 10a package 8 pin soic typical connection dc + dc - dc - dc flyback vcc gnd v ee 15 v or bootstrap dc - dc flyback vcc gnd v ee 15 v or 15 v supply buffer driver gnd vcc auir 0815 buffer gnd v ee v cc outh outl in lpm cb buffer driver gnd vcc auir0815 buffer gnd v ee in lpm cb ron roff v cc outh outl ron roff
AUIR0815S 2 www.irf.com ? 20 12 international rectifier january 08, 2013 qualification information ? qualification level automotive (per aec - q100 ?? ) comments: this family of ics has passed an automotive qualification. ir?s industrial and consumer qualification level is granted by extension of the higher automotive level. moisture sensitivity level soic 8n msl 2 ??? 260c (per ipc/jedec j - std - 020) esd machine model class m1 ( pass +/ - 1 0 0 v ) (per aec - q100 - 003) human body model class h 1 b (+/ - 1 000v) ( per aec - q100 - 002 ) charged device model class c4 ( pass +/ - 1000 v ) (per aec - q100 - 011) ic latch - up test class ii , level a (per aec - q100 - 004) rohs compliant yes ? qualification standards can be found at international rectifier?s web site http://www.irf.com/ ?? exceptions to aec - q100 requirements , if any, are noted in the qualification report. ??? higher msl ratings may be availa bl e for the specific package type listed here. please contact your international rectifier sales representative for further information.
AUIR0815S 3 www.irf.com ? 20 12 international rectifier january 08, 2013 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which permanent damage to the device may occur. these are stress ratings only, functional operation of the device at these or any other condition beyond those indicated in the ?recommended operating condition? is not implied. exposure to absolute maximum - rated conditions for extended periods may affect device reliability. all voltage parameters are absolute voltages referenced to gnd unless otherwise stated in the table. the thermal resistance and po wer dissipation ratings are measured under board mounted and still air conditions. symbol definition min max units gnd to vcc -37 0.3 v v ee to vcc - 37 0.3 v v in logic input voltage to vcc - 40 0.3 v vb vbootstrap to output - 0.3 5.5 v lpm lpm voltage to vcc - 40 0.3 (*) v v outh outh output voltage vcc - 37 v cc + 0.3 v v outl outl output voltage v ee - 0.2 v cc + 0.3 v p d package power dissipation @ t a 25 c ? 1 w rth ja thermal resistance, junction to ambient ? 80 c/w t j junction temperature - 40 150 c t s storage temperature - 55 150 c t l lead temperature (soldering, 10 seconds) ? 300 c (*) lpm is allowed to settle to an higher voltage than specified providing a current limitation of 10ua recommended operating conditions for proper operation the device should be used within the recommended conditions. all voltage parameters are absolute voltages referenced to gnd unless otherwise stated in the table symbol definition min. max. units v cc - gnd gate driver positive supply voltage 6(*) 30 v gnd - v ee gate driver negative supply voltage. v ee is shorted to gnd in case of single supply operation -1 15 vcc - v ee total supply voltage 10 30 v outh outh output voltage vcc - 30 vcc v outh - v ee voltage difference between outh and v ee - 5 ? v in logic input voltage (in and lpm) vcc - 35 v cc cboot output pull up boot capacitor 10 20 nf ron outh series resistor to gate 1.5 20 ohm roff outl series resistor to gate 1.5 20 ohm cs snubber capacitor between outh and vcc 10 24 nf pwoff in ?low? pulse width (**) 2 usec (*)when 3v< v cc- gnd < v cc- gnd_min 30 ohm max resistance pulls down outl to v ee while outh is in hiz. guaranteed by design. (**) v cc -v ee <12v, see also ? role of cboot and effect of short ?off? pulses ? chapter .
AUIR0815S 4 www.irf.com ? 20 12 international rectifier january 08, 2013 static electrical characteristics v cc - gnd= 15v; gnd-v ee =5v; 15nf connects cb to outh; 22nf connects vcc to outh ; - 40 c < t a < 125 c unless otherwise specified. symbol definition min typ max units test conditions v ccuv+ v cc - gnd supply undervoltage positive going threshold 10.2 11.7 12.8 v lpm=hin=1=vcc ve=gnd; outh pulled to v cc - 2v with 100ma current limitation v ccuv - v cc - gnd supply undervoltage negative going threshold 9.6 10.5 11.4 v ccuvh v cc - gnd supply undervoltage lockout hysteresis 0.5 1.2 ? vb uv vbootstrap undervoltage (*) ? 4 ? v i qgg gnd supply current ? ? 60 ua in=x; lpm=x i qeesw v ee supply current, in switching 2 4 10 ma in switches at 10khz 50% duty cycle; lpm=1 i qee0 v ee supply current, in=0 ? ? 8.0 ma steady state with in=0 and lpm=1 i qee025 v ee supply current, in=0 ? ? 6.5 ma steady state with in=0 and lpm=1 , t=25^c i qee1 v ee supply current, in=1 ? ? 3 ma steady state with in=1 and lpm=1 i qeelq0 v ee supply current, lpm=0, in=0 ? ? 2 ma steady state with in=0 and lpm=0 i qeelq1 v ee supply current, lpm=0, in=1 ? ? 1.5 ma steady state with in=1 and lpm=0 i qeeuv v ee supply current, v cc v ccuv - v inl vcc logic "0" in input voltage to v cc - 5.5 - 4.5 - 3.5 v inhis logic in input hysteresis 1 2 3 .3 v lpmh vcc logic "1" lpm input voltage to v cc -3 - 2.5 - 1.4 v v cc - gnd> v ccuv - v lpml vcc logic "0" lpm input voltage to v cc - 3.8 - 3 - 2.5 v lpmhis logic lpm input hysteresis 0.25 - 1.8 i in15 current flowing out from in when v cc - in=15v 40 90 180 ua in=gnd i lpm15 current flowing out from lpm v cc - lpm=15v 10 25 50 ua lpm=gnd
AUIR0815S 5 www.irf.com ? 20 12 international rectifier january 08, 2013 pins: outh,outl v cc - gnd= 15v; gnd-v ee =5v; 15nf connects cb to outh; 22 nf connects vcc to outh ; - 40 c < t a < 125 c unless otherwise specified. symbol definition min typ max units test conditions rup_outh25 rdson pull up transistor outh ? 90 120 mohm 10a current pulse with pw<10usec t a =25^c rdw_outl25 rdson pull down transistor outl ? 180 240 rup_outh rdson pull up transistor outh ? ? 180 10a current pulse with pw<10usec rdw_outl rdson pull down transistor outl ? ? 320 i pmos outh pull up current when bootstrap cap is discharged 5 20 30 ma in=1 lpm=1, cb - outh=2.5v, outh pulled to vcc - 1.5v ac electrical characteristics v cc - gnd= 15v; gnd - v ee =5v; 15nf connects cb to outh; 22 nf connects vcc to outh ; ron= 5 ohm , roff = 5 ohm , c load =100nf , - 40 c < t a < 125 c unless otherwise specified. propagation is from input at gnd or v cc to 10% voltage variation of output rise fall time is delay from 10% to 90% output swing symbol definition min. typ. max. units test conditions t on turn on propagation delay in - outh ? 250 400 ns t off turn off propagation delay in - outl ? 250 350 t r turn on rise time outh ? ? 26 0 t f turn off fall time outl ? ? 150 t rlq turn on rise time outh in low quiescent currrent mode ? ? 1000 ns v ee =gnd, lpm=0, v cc rises above v ccuv+ ; c load =100nf ron= 5 ohm, roff = 5 ohm t flq turn off fall time outl in low quiescent currrent mode ? ? 1000 ns v ee =gnd, lpm=0, v cc falls below v ccuv - + ; c load =100nf ron= 5 ohm, roff = 5 ohm pw on in high pulse width (*) 500 ? ? ns no c load , - 40 c < t a < 125 c pw off in low pulse width (*) 500 ? ? ns no c load , - 40 c < t a < 125 c (*) in pulse width lower than pw onmin (pw offmin ) min can be filtered
AUIR0815S 6 www.irf.com ? 20 12 international rectifier january 08, 2013 block diagram: cb v ee in lpm v cc 40 v 6 v v cc , uv v cc v cc 40 v 6 v lpm mode normal mode i bias 0 1 v cc cb 40 v 40 v v b uv outh outl v cc gnd cb outh outh gnd gnd 40 v v cc 40 v v cc 6 v 40 v v cc outh v ee typical connection cb 12 nf ron 5 ohm to igbt gate vcc c1 2.2uf c2 2.2uf vee in l pm roff 5 ohm cs 20nf outh outl gnd cg it is recommended: ? to have a capacitance cs connected between outh and vcc to limit dv/dt in outh node (mandatory if vcc - vee>15 v) . see recommended operating condition for cs value. ? to avoid the condition wit h outh directly shorted to outl ? use ceramic capacitor for c1 and c2 with value > 20* cgate
AUIR0815S 7 www.irf.com ? 20 12 international rectifier january 08, 2013 application information and additional details recommended maximum switching frequency when driving a capacitance c with a 3 ohm external resistor. cs=20nf is connected between outh and vcc. vcc - v ee =24v. truth table vcc in lpm status/comment v cc- gnd_min to v ccuv - - outl = v ee , outh in hiz ? igbt off; low quiescent current mode is active. v ccuv to 30v 0 1 outl = v ee , outh in hiz ? igbt off; v ccuv to 30v 1 1 outl in hiz, outh = vcc ? igbt on; v ccuv to 30v 0 0 outl = v ee , outh in hiz ? igbt off; low quiescent current mode is active v ccuv to 30v 1 0 outl in hiz, outh = vcc ? igbt on; low quiescent current mode is active role of cboot and effect of s hort ? o ff? p ulses cboot capacitance, connected between outh and cb acts as a bootstrap supplying the circuitry driving the low rdson ( rup_outh ) pull - up nmos connected between vcc and outh. in the application, when in is low, outh is tied to vee and cboot is charged to around 6v. at in rising the pullup nmos is turned on and it is able to provide a low impedence path between vcc and outh . maintaining in high , cboot get discharged and therefore the pull - up nmos is turned off but the parallel pmos (see block diagram) remains on maintaining outh tied to vcc. cboot discharge rate is i qb /cboot, typically it takes about 250 usec for a complete discharge. in case cboot get discharged , the subsequent off pulse width must be long enough to recharge cboot above the bootstrap under - voltage threshold vb uv . t o allow the turn on of the pull - up nmos when in rises again. short off pulse width can lead to a situation, after the pulse, with too low igbt vge voltage, worst case is for low values of v cc - v ee , that is just above v ccuv - . even though it is allowed, a t higher values of vcc - vee, to reduce the off pulse width below pwoff min , it is suggested to keep the off pulse width above 1usec in every working condition.
AUIR0815S 8 www.irf.com ? 20 12 international rectifier january 08, 2013 examples of system schematics with hvic this section shows how ir high voltage ic (hvic) gate drivers can be used to drive the auir0815 . all the examples refer to a n inverter leg , showing the floating voltage sources vcch and veeh to supply the high side auir0 815 and vccl and veel to supply the low side auir0815. all the examples show 7v floating voltage sources to provide a negative vge to turn off each igbt. in case a negative vge is not required these voltage sources can be replaced with a short circuit. in case of three phase inverters, each of the high side auir0815 must have separ ated and isolated voltage supplies . o nly one dc power supply can be shared for the low sides auir0815 supplies (to be connected between auir0815 vcc and gnd pins) and the corresponding drivers supplies ( to be connected between hvic vcc and vss =com) pins . normally high di/dt occurs at low side switch turn on. this causes voltage spi kes at low side igbt emitter node , because of the inductive impedance zl, and the system must be robust to this. a better immunity to the above transients can be obtained using one separate low side dc power supply for each low side . example 1 : using the auirs2181, high and low side driver with com and no vss pin. auirs2181 v b ho v s v cc hin com lin lo auir0815 buffer gnd v ee v cc outh outl in vcch=15v veeh=7v dc+ auir0815 buffer gnd v ee v cc outh outl in vccl=15v veel=7v dc- z h zl example 1
AUIR0815S 9 www.irf.com ? 20 12 international rectifier january 08, 2013 example 2 : using the auirs2181 4 (or the auirs2191) , high and low side driver with com pin and vss pin. auirs21814 v b ho v s v cc hin v ss lin lo com auir0815 buffer gnd v ee v cc outh outl in vcch=15v veeh=7v dc+ auir0815 buffer gnd v ee v cc outh outl in vccl=15v veel=7v dc- (auirs2191 ) zh zl example 2 example 3 : using the auirs2117(8), single channel driver. com can be shorted to the vs of the low side. auirs2117 (8) v b ho v s v cc in com auir0815 buffer gnd v ee v cc outh outl in vcch=15v veeh=7v dc+ auirs2117 (8) v b ho v s v cc in com auir0815 buffer gnd v ee v cc outh outl in vccl=15v veel=7v vcc=15v dc- zh zl example 3
AUIR0815S 10 www.irf.com ? 20 12 international rectifier january 08, 2013 lead assignments lpm 1 4 5 8 v cc in gnd v ee outl cb outh 8 pin soic lead definitions symbol description v cc positive supply in logic input for out lpm logic input, for low power mode: lpm=0 activates the low quiescent current mode gnd ground outh power output (pull up) outl power output (pull down) c b boot capacitor v ee negative supply pin (short to gnd in case of single supply operation)
AUIR0815S 11 www.irf.com ? 20 12 international rectifier january 08, 2013 parameter temperature trends figures illustrated in this chapter provide information on the experimental performance of the ic. the line plotted in each figure is generated from actual lab data. a large number of individual samples were tested at three temperatures ( - 40 oc, 25 oc, and 125 oc) in order to generate the experimental curve. the line consists of three data points (one data point at each of the tested temperatures) that have been connected together to illustrate the understood trend. the individual data points on the curve were determined by calculating the averaged experimental value of the parameter (for a given temperature).
AUIR0815S 12 www.irf.com ? 20 12 international rectifier january 08, 2013
AUIR0815S 13 www.irf.com ? 20 12 international rectifier january 08, 2013
AUIR0815S 14 www.irf.com ? 20 12 international rectifier january 08, 2013 case outline
AUIR0815S 15 www.irf.com ? 20 12 international rectifier january 08, 2013 tape and reel: soic8 carrier tape dimension for 8soicn code min max min max a 7.90 8.10 0.311 0.318 b 3.90 4.10 0.153 0.161 c 11.70 12.30 0.46 0.484 d 5.45 5.55 0.214 0.218 e 6.30 6.50 0.248 0.255 f 5.10 5.30 0.200 0.208 g 1.50 n/a 0.059 n/a h 1.50 1.60 0.059 0.062 reel dimensions for 8soicn code min max min max a 329.60 330.25 12.976 13.001 b 20.95 21.45 0.824 0.844 c 12.80 13.20 0.503 0.519 d 1.95 2.45 0.767 0.096 e 98.00 102.00 3.858 4.015 f n/a 18.40 n/a 0.724 g 14.50 17.10 0.570 0.673 h 12.40 14.40 0.488 0.566 metric imperial metric imperial e f a c d g a b h note : controlling dimension in mm loaded tape feed direction a h f e g d b c
AUIR0815S 16 www.irf.com ? 20 12 international rectifier january 08, 2013 part marking information a0815sd ir logo ayww ? part number date code pin 1 identifier lot code (prod mode ? 4 digit spn code) assembly site code per scop 200-002 ? xxxx marking code lead free released ? p ordering information base part number package type standard pack complete part number form quantity AUIR0815S soic 8 tube/bulk 9 5 auir0815 s tape and reel 2500 AUIR0815Str
AUIR0815S 17 www.irf.com ? 20 12 international rectifier january 08, 2013 important notice unless specifically designated for the automotive market, international rectifier corporation and its subsidiaries (ir) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or services without notice. part numbers designated with the ?au? prefix follow automotive industry and / or customer specific requirements with regards to product discontinuance and process change notification. all prod ucts are sold subject to ir?s terms and conditions of sale supplied at the time of order acknowledgment. ir warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ir?s standard warranty. testi ng and other quality control techniques are used to the extent ir deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ir assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ir components. to minimize the risks with customer products and applications, customers should provide adequate design and operating safeguards. reproduction of ir information in ir data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information w ith alterations is an unfair and deceptive business practice. ir is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ir products or serviced with statements different from or beyond the parameters stated by ir for that product or service voids all express and any implied warranties for the associated ir product or service and is an unfair and deceptive business practice. ir is not responsible or liable for an y such statements. ir products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the fa ilure of the ir product could create a situation where personal injury or death may occur. should buyer purchase or use ir products for any such unintended or unauthorized application, buyer shall indemnify and hold international rectifier and its officer s, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended o r unauthorized use, even if such claim alleges that ir was negligent regarding the design or manufacture of the product. only products certified as military grade by the defense logistics agency (dla) of the us department of defense, are designed and manuf actured to meet dla military specifications required by certain military, aerospace or other applications. buyers acknowledge and agree that any use of ir products not certified by dla as military - grade, in applications requiring military grade products, i s solely at the buyer?s own risk and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. ir products are neither designed nor intended for use in automotive applications or environments un less the specific ir products are designated by ir as compliant with iso/ts 16949 requirements and bear a part number including the designation ?au?. buyers acknowledge and agree that, if they use any non - designated products in automotive applications, ir will not be responsible for any failure to meet such requirements. for technical support, please contact ir?s technical assistance center http://www.irf.com/technical - info/ world headquarters: 101 n. se pulveda blvd., el segundo, california 90245 tel: (310) 252 - 7105
AUIR0815S 18 www.irf.com ? 20 12 international rectifier january 08, 2013 revision history date comment dec. 2, 2009 - v e pin name changed into v ee ; note1 modified; vee - vcc 40v diode added in block diagram; current consumption table parameters modified; feb 24, 2010 st. el. ch : i qoutl1 parameter added; i qouth0 max=2ma; i qb max=0.5ma; i bouth =60ma; i qee0 max=6ma; i qee1 max=3ma; i qb definition corrected; i qeesw value deleted; rec. op. con.:cboot=10nf..20nf ac el char: rise fall time definition modified; ssd= 100us typ feb 24b, 2010 soft shutdown function removed (ssd in /en pin renamed en); rup dc max value deleted; typ connection; i qgg and i qeeen0 feb 25, 2010 outl clamp function added: changes in i qoutl1 , i qee1 ; added vcl, tcl1, tcl2 apr 23, 2010 outl clamp function removed: i qoutl1 =1ua typ, i qee1 =3ma typ; vcl, tcl1 and tcl2 removed. change in en pin functionality, now it is a low quiescent current mode input: front end page description; abs max rat en max note added; rec op cond: note added to specify pulldown 30 ohm max for vcc down to 3v. static el char: change in en and in thresholds and rin. i qeelq and i qeeuv parameters introduced to specify consumption in low quiescent current mode (en=1 or vcc< vcc uv - ). truth table modified to define v ccuv and low quiescent current mode conditions lead definition modified to specify new en function. ac electr char: tr and tf specified for low quiescent current mode. may 15, 2010 en pin renamed into lpm. over temperature protection removed block diagram: ? diode outl - vcc added, ? in and lpm input stage detailed drawing added. static el char: ? in and lpm input impedance spec modified ? note added to define vb uv . ? i qeelen0 parameter removed because already covered by i qeelq , ? i qgg test conditions changed from in=0 ; lpm=1 into in=x; lpm=x, ? lpm input thresholds lowered by 1v ? rup renamed i pmos . ac el char: ? t en parameter removed, ? max values added for t on , t off , t r , t f . rec. op. cond.: gnd - vee min changed from 0v to - 1v. jun 25, 2010 i bouth , i in15 , parameters change; added pw on and pw off parameters; mar 01, 2011 update in test conditions for i outh+, i outl, rup_outh, rdw_outl. i qeelq split into i qeelq0 and i qeelq1 i bouth redefined as current flowing out from cb (and not outh). truth table corrected to show how lpm does not affect the functionality. update of heading for absolute maximum ratings update of chart with max f vs c. abs max rat: v outh = vcc - 37v min; v outl = v ee - 0.2v min. rec op con: v outh = vcc - 30v min; v outh - v ee = - 5v min; mar 02, 2011 static and dynamic el. char: parameter limits reviewed for matching full temp range. values in blue are still older datasheet version target value at t=25^c. added recommendation to avoid direct short between outh and outl. added preliminary parameter temperature trend paragraph. i pmos test condition corrected. jun 22, 2011 vccuv thresholds modified; typ connection diagram: diode removed and snubber capacitance added; maxf vc c chart updated taking into account cs=20nf as snubber capacitance jun 27, 2011 matched delay outputs front page note deleted; rec op cond vcc - gnd max changed from 20v to 30v. ac el cher: tofftyp changed from 150ns to 250ns.vccuv+ and toff charts modified. aug 26, 2011 added paragraph explaining role of cboot. cs snubber capacitor added in recommended operating conditions and in default test set - up. v ccuv+ : min from 10.6v to 10.2v ; v ccuv - :min from 9.7v to 9.6v ; v ccuvh :min from 0.8v to 0.5v ; i qeesw : max from 8ma to 10ma ; i qouth0 : max from 3ma to 3.5ma ; v in h vcc : max from - 1.5 v to - 1v; v lpmh vcc : max from - 2.5 v to - 1.5v; v lpmhis : max from 1 v to 1.8v; i pmos : min from 10ma to 5ma; t on : max from 380ns to 400ns; t o ff : max from 300ns to 350ns; t r : max from 150ns to 250ns; sep 6, 2011 change s in typ connection recommandations; maxf vs c chart update; v lpml vcc min change from - 3.5v to - 3.8 v . temperature charts updated. sept. 7, 2011 corrected part number on header; added rohs compliant & automotive qualified to front page; deleted preliminary and added automotive grade on front page top header; added qual info page; added tape and reel info; added part marking; added ordering info; added important notice
AUIR0815S 19 www.irf.com ? 20 12 international rectifier january 08, 2013 oct 10, 2011 rec op cond: added description of vouth and vouth - vee oct 17, 2011 rec op cond: added ? guaranteed by design? in note under the table; sta. el. char. table: v ccuvh min changed from 0.5v to 0.3v. pins: in, lpm table: v inhis max changed from 3v to 3.3v; v lpmh vcc max changed from - 1.5v to - 1.4v ac el char table: t r max changed from 250ns to 260ns oct 19, 2011 sta. el. char. table: v ccuvh min changed back from 0.3v to 0.5 v. oct 26, 2011 revised msl rating to msl - 2 jan 20 th , 2012 application section added: examples of system with hvic jan 24 th , 2012 ? examples of system schematics with hvic ? modified; block diagram updated. october 24 th 2012 added effect of short ?off? pulses part in applic ation info and minimum pwoff in recommended op cond. front page typ connection, snubber cap added. examples of system schematics with hvic : added pullup resistors at in in ex1 and ex2


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